Semiconductor switch control device
Abstract:
The semiconductor switch control device includes a first FET provided between an anode of a battery and a load and a second FET arranged between a cathode of the battery and the load, in which in a case where a current value that is larger than an abnormal current value indicating that a first drain current flowing through the first FET is an overcurrent and smaller than a maximum current value of the first drain current that can be tolerated by the first FET is set as a current limit value, a limiting gate voltage for setting the current value of the first drain current to a current limit value is applied to the second FET.
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