The invention relates to a stochastic-type microprocessor.In some embodiments, the microprocessor comprises an elementary stochastic computation module able to receive, as input, two random and independent binary input signals each representing a binary coding of two respective given input probability values, and able to generate, as output, a random binary output signal.The elementary module comprises: a programmable logic unit, able to combine two input signals to generate an output signal; an addressable memory, able to store an output probability value coded by an output signal generated by the logic unit; a first stochastic clock, able to produce a first clock signal; a second stochastic clock, able to produce a second clock signal.