Invention Grant
- Patent Title: Memory devices and apparatus configured to apply positive voltage levels to data lines for memory cells selected for and inhibited from programming
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Application No.: US16035857Application Date: 2018-07-16
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Publication No.: US10438672B2Publication Date: 2019-10-08
- Inventor: Akira Goda , Yijie Zhao , Krishna Parat
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/34 ; G11C16/04

Abstract:
Memory devices including a controller configured to cause the memory device to apply a positive first voltage level to a first data line selectively connected to a first string of series-connected memory cells while applying a second voltage level, higher than the first voltage level, to a second data line selectively connected to a second string of series-connected memory cells; while applying the first voltage level to the first data line and applying the second voltage level to the second data line, applying a third voltage level to a particular access line coupled to a memory cell of a first string of series-connected memory cells selected for programming, wherein a differential between the third voltage level and the first voltage level is configured to increase a threshold voltage of the memory cell selected for programming, as well as other apparatus containing similar memory devices.
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