A semiconductor memory device including a first semiconductor layer, first gate electrodes, a first gate insulating layer and a laminated film. The first semiconductor layer extends in a first direction intersecting a substrate. The first gate electrodes are arranged in the first direction and face the first semiconductor layer in a second direction intersecting the first direction. End portions of the first gate electrodes in the second direction have different positions from each other and form a stepped contact portion. The laminated film covers at least parts of upper surfaces and at least parts of side surfaces intersecting the second direction, of the first gate electrodes. The laminated film includes a first insulating layer, second semiconductor layers, a second gate insulating layer, and a second gate electrode. Positions in the first direction and positions in the second direction of the second semiconductor layers are different from each other.