Invention Grant
- Patent Title: Semiconductor device and method of integrating power module with interposer and opposing substrates
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Application No.: US15954326Application Date: 2018-04-16
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Publication No.: US10438932B2Publication Date: 2019-10-08
- Inventor: Jinchang Zhou , Yusheng Lin , Mingjiao Liu
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Adam R. Stephenson, Ltd.
- Main IPC: H01L25/07
- IPC: H01L25/07 ; H01L29/739 ; H01L25/00 ; H01L23/538 ; H01L25/11 ; H01L25/065 ; H01L41/083 ; H01L23/00

Abstract:
A semiconductor device has an interposer including a plurality of conductive vias formed through the interposer. A first semiconductor die is disposed over the interposer. A second semiconductor die is disposed over a first substrate. The first semiconductor die and second semiconductor die are power semiconductor devices. The interposer is disposed over the second semiconductor die opposite the first substrate. A second substrate is disposed over the first semiconductor die opposite the interposer. The first substrate and second substrate provide heat dissipation from the first semiconductor die and second semiconductor die from opposite sides of the semiconductor device. A plurality of first and second interconnect pads is formed in a pattern over the first semiconductor die and second semiconductor die. The second interconnect pads have a different area than the first interconnect pads to aid with alignment when stacking the assembly.
Public/Granted literature
- US20180233491A1 SEMICONDUCTOR DEVICE AND METHOD OF INTEGRATING POWER MODULE WITH INTERPOSER AND OPPOSING SUBSTRATES Public/Granted day:2018-08-16
Information query
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