Invention Grant
- Patent Title: Insulated gate bipolar transistor
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Application No.: US15916518Application Date: 2018-03-09
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Publication No.: US10439054B2Publication Date: 2019-10-08
- Inventor: Tsuneo Ogura , Tomoko Matsudai
- Applicant: Kabushiki Kaisha Toshiba , Toshiba Electronic Devices & Storage Corporation
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- Current Assignee: Kabushiki Kaisha Toshiba,Toshiba Electronic Devices & Storage Corporation
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: White & Case LLP
- Priority: JP2017-127476 20170629; JP2018-035431 20180228
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/739 ; H01L29/40 ; H01L29/423 ; H01L29/10

Abstract:
According to one embodiment, an IGBT has a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, a fourth semiconductor layer of the first conductivity type, and a fifth semiconductor layer of the second conductivity type, between a first electrode and a second electrode, on the first electrode in order. A third electrode is provided on the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer via a gate insulating film, and is insulated from the first electrode and the second electrode. A fourth electrode is provided between the third electrode and the second semiconductor layer, and is insulated from the third electrode and the second semiconductor layer.
Public/Granted literature
- US20190006495A1 INSULATED GATE BIPOLAR TRANSISTOR Public/Granted day:2019-01-03
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