Invention Grant
- Patent Title: Duty locked loop circuit
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Application No.: US15953157Application Date: 2018-04-13
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Publication No.: US10439597B1Publication Date: 2019-10-08
- Inventor: Guolei Yu , Ajay Kumar Kosaraju , Charles Tuten , Marko Koski , Aniruddha Bashar
- Applicant: Qualcomm Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michael R. Harris
- Main IPC: H03K3/017
- IPC: H03K3/017 ; H03K3/023 ; H03H7/06 ; H03K19/20

Abstract:
The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.
Public/Granted literature
- US20190319610A1 DUTY LOCKED LOOP CIRCUIT Public/Granted day:2019-10-17
Information query
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