Invention Grant
- Patent Title: Memory page request for optimizing memory page latency associated with network nodes
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Application No.: US15351477Application Date: 2016-11-15
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Publication No.: US10439960B1Publication Date: 2019-10-08
- Inventor: Ankit Jindal , Pranavkumar Sawargaonkar , Keyur Chudgar
- Applicant: Ampere Computing LLC
- Applicant Address: US CA Santa Clara
- Assignee: AMPERE COMPUTING LLC
- Current Assignee: AMPERE COMPUTING LLC
- Current Assignee Address: US CA Santa Clara
- Agency: Alston & Bird LLP
- Main IPC: H04L12/933
- IPC: H04L12/933 ; G06F12/06 ; G06F9/455

Abstract:
Various aspects optimize memory page latency and minimize inter processor interrupts associated with network nodes in a virtual computer system. For example, a system can include a first network node and a second network node. The first network node generates a memory page request in response to an invalid memory access associated with a virtual central processing unit of the first network node. The memory page request includes an identifier for the virtual central processing unit. The second network node receives the memory page request and provides memory data associated with memory page request to the first network node.
Information query