Invention Grant
- Patent Title: Fan-out wafer level packages having preformed embedded ground plane connections
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Application No.: US15795594Application Date: 2017-10-27
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Publication No.: US10440819B2Publication Date: 2019-10-08
- Inventor: Michael B. Vincent
- Applicant: NXP USA, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H05K1/00
- IPC: H05K1/00 ; H05K1/18 ; H05K7/00 ; H05K1/02 ; H05K1/11 ; H05K3/46 ; H05K3/10 ; H05K3/00 ; H01L23/552 ; H01L21/78 ; H01L23/00 ; H01L21/56

Abstract:
Fan-Out Wafer Level Packages (FO-WLPs) having Embedded Ground Plane (EGP) connections are provided. In one embodiment, the FO-WLP includes a molded package body having a frontside and an opposing backside. An EGP and a first preformed EGP connection are contained within the molded package body. The first preformed EGP connection is bonded to the EGP and extends therefrom to the backside of the molded package body. The FO-WLP further includes an electrically-conductive structure, such as an Electromagnetic Interference (EMI) shield, provided on the backside of the molded package body. The electrically-conductive structure is electrically coupled to the EGP through the first preformed EGP connection.
Public/Granted literature
- US20180063948A1 FAN-OUT WAFER LEVEL PACKAGES HAVING PREFORMED EMBEDDED GROUND PLANE CONNECTIONS Public/Granted day:2018-03-01
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