Invention Grant
- Patent Title: Semiconductor integrated circuit device
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Application No.: US16000967Application Date: 2018-06-06
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Publication No.: US10446581B2Publication Date: 2019-10-15
- Inventor: Yusuke Kanno , Hiroyuki Mizuno , Yoshihiko Yasu , Kenji Hirose , Takahiro Irita
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2005-166714 20050607
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H03K19/00 ; H01L27/00 ; H01L23/00 ; H01L27/118 ; H01L27/02 ; H03K3/037 ; H01L23/48 ; H01L23/50 ; H01L23/528 ; H03K17/16 ; G11C11/419 ; H03K3/03 ; H01L29/78 ; H03K19/003

Abstract:
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.
Public/Granted literature
- US20180286885A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2018-10-04
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