Invention Grant
- Patent Title: Wafer laminate and making method
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Application No.: US15360418Application Date: 2016-11-23
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Publication No.: US10453732B2Publication Date: 2019-10-22
- Inventor: Hiroyuki Yasuda , Michihiro Sugo , Hideto Kato
- Applicant: SHIN-ETSU CHEMICAL CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: SHIN-ETSU CHEMICAL CO., LTD.
- Current Assignee: SHIN-ETSU CHEMICAL CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2015-230407 20151126
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L21/304 ; H01L23/00 ; C09J165/00 ; C09J183/14 ; C09D5/32 ; C09D165/00 ; C09D183/14 ; C09J5/00 ; C08G77/52 ; C08K5/00 ; C08L63/00

Abstract:
A wafer laminate has an adhesive layer (3) sandwiched between a transparent substrate (1) and a water (2), with a circuit-forming surface of the wafer facing the adhesive layer. The adhesive layer (3) includes a first cured resin layer (3a) disposed adjacent the substrate and having light-shielding properties and a second cured resin layer (3b) disposed adjacent the wafer and comprising a cured product of a thermosetting resin composition.
Public/Granted literature
- US20170154802A1 WAFER LAMINATE AND MAKING METHOD Public/Granted day:2017-06-01
Information query
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