Invention Grant
- Patent Title: Method of filling retrograde recessed features with no voids
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Application No.: US15950611Application Date: 2018-04-11
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Publication No.: US10453737B2Publication Date: 2019-10-22
- Inventor: Kandabara N. Tapily
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/02

Abstract:
A method is described for void-free material filling of fine recessed features found in semiconductor devices. According to one embodiment, the method includes providing a patterned substrate containing a recessed feature having an opening, a sidewall and a bottom, the sidewall including an area of retrograde profile relative to a direction extending from a top of the recessed feature to the bottom of the recessed feature, coating the substrate with a metal-containing catalyst layer, deactivating a portion of the metal-containing catalyst layer that is near the opening of the recessed feature by exposure to a halogen-containing gas, and selectively depositing a material on the metal-containing catalyst layer in the recessed feature that has not been deactivated by the halogen-containing gas. The method can further include repeating the coating, deactivating and selectively depositing at least once to deposit an additional amount of the material to fully fill the recessed feature.
Public/Granted literature
- US20180294181A1 METHOD OF FILLING RETROGRADE RECESSED FEATURES WITH NO VOIDS Public/Granted day:2018-10-11
Information query
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