Invention Grant
- Patent Title: Void formation in charge trap structures
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Application No.: US15675265Application Date: 2017-08-11
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Publication No.: US10453855B2Publication Date: 2019-10-22
- Inventor: Chris M Carlson , Ugo Russo
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L27/1157
- IPC: H01L27/1157 ; H01L21/28 ; H01L27/11582 ; H01L29/423 ; H01L29/51

Abstract:
Electronic apparatus and methods of forming the electronic apparatus may include one or more charge trap structures for use in a variety of electronic systems and devices, where each charge trap structure includes a dielectric barrier between a gate and a blocking dielectric on a charge trap region of the charge trap structure. In various embodiments, a void is located between the charge trap region and a region on which the charge trap structure is disposed. In various embodiments, a tunnel region separating a charge trap region from a semiconductor pillar of a charge trap structure, can be arranged such that the tunnel region and the semiconductor pillar are boundaries of a void. Additional apparatus, systems, and methods are disclosed.
Public/Granted literature
- US20190051656A1 VOID FORMATION IN CHARGE TRAP STRUCTURES Public/Granted day:2019-02-14
Information query
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