Invention Grant
- Patent Title: Method for maximizing frequency while checking data integrity on a physical interface bus
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Application No.: US15679468Application Date: 2017-08-17
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Publication No.: US10466920B2Publication Date: 2019-11-05
- Inventor: Yonatan Tzafrir , Mordekhay Zehavi , Mahmud Asfur
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Agent Steven H. Versteeg
- Main IPC: G11C8/00
- IPC: G11C8/00 ; G06F3/06 ; G06K7/00

Abstract:
A data storage device includes a controller and a memory. The controller includes a host interface and a memory interface. The controller performs a first operation on the memory through the memory interface at a first frequency associated with the host interface to determine a first data pattern. The controller performs a read operation on the memory through the memory interface at a second frequency to determine a second data pattern. The controller changes the first frequency by a predetermined amount until the first frequency is equal to a maximum operating frequency having an associated risk of a setup/hold violation that is below a predetermined probability.
Public/Granted literature
- US20190056880A1 METHOD FOR MAXIMIZING FREQUENCY WHILE CHECKING DATA INTEGRITY ON A PHYSICAL INTERFACE BUS Public/Granted day:2019-02-21
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