The present disclosure provides a transistor device and a semiconductor layout structure. The transistor device includes a substrate including at least one active region, an isolation structure surrounding the active region, a gate structure disposed over the substrate, and a source/drain region disposed at two opposite sides of the gate structure. The gate structure includes a first portion extending along a first direction and a second portion extending along a second direction perpendicular to the first direction. The first portion of the gate structure overlaps a first boundary between the active region and the isolation structure.