Invention Grant
- Patent Title: Semiconductor structure with source/drain multi-layer structure and method for forming the same
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Application No.: US16043371Application Date: 2018-07-24
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Publication No.: US10468530B2Publication Date: 2019-11-05
- Inventor: Chun-Chieh Wang , Yu-Ting Lin , Yueh-Ching Pai , Shih-Chieh Chang , Huai-Tei Yang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/06 ; H01L29/08 ; H01L27/088 ; H01L21/8238 ; H01L21/768 ; H01L21/3065

Abstract:
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a gate spacer and a source/drain structure. The gate structure is positioned over a fin structure. The gate spacer is positioned over the fin structure and on a sidewall surface of the gate structure. The source/drain structure is positioned in the fin structure and adjacent to the gate spacer. The source/drain structure includes a first source/drain epitaxial layer and a second source/drain epitaxial layer. The first source/drain epitaxial layer is in contact with the fin structure. The first source/drain epitaxial layer is connected to a portion of the second source/drain epitaxial layer below a top surface of the fin structure. The lattice constant of the first source/drain epitaxial layer is different from the lattice constant of the second source/drain epitaxial layer.
Public/Granted literature
- US20190148556A1 SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN MULTI-LAYER STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2019-05-16
Information query
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