Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US16023951Application Date: 2018-06-29
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Publication No.: US10475719B2Publication Date: 2019-11-12
- Inventor: Pei-Haw Tsao , Chien-Jung Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L21/56 ; H01L23/00

Abstract:
A semiconductor structure includes a substrate comprising a die pad disposed over the substrate, and a passivation disposed over the substrate and surrounding the die pad, a redistribution layer (RDL) comprising a dielectric layer disposed over the passivation and an interconnect structure disposed within the dielectric layer and electrically connecting with the die pad, a conductive bump disposed over and electrically connected with the interconnect structure; and an isolation layer surrounding the substrate and the RDL.
Public/Granted literature
- US20180308779A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2018-10-25
Information query
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