Invention Grant
- Patent Title: Method for forming semiconductor device structure having conductive structure with twin boundaries
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Application No.: US16205997Application Date: 2018-11-30
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Publication No.: US10475742B2Publication Date: 2019-11-12
- Inventor: Jian-Hong Lin , Chwei-Ching Chiu , Yung-Huei Lee , Chien-Neng Liao , Yu-Lun Chueh , Tsung-Cheng Chan , Chun-Lung Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/528 ; H01L23/532 ; H01L21/288 ; H01L21/768

Abstract:
A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.
Public/Granted literature
- US20190103351A1 METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE HAVING CONDUCTIVE STRUCTURE WITH TWIN BOUNDARIES Public/Granted day:2019-04-04
Information query
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