Invention Grant
- Patent Title: Flexible merge scheme for source/drain epitaxy regions
-
Application No.: US15492142Application Date: 2017-04-20
-
Publication No.: US10483266B2Publication Date: 2019-11-19
- Inventor: Kai-Hsuan Lee , Chia-Ta Yu , Cheng-Yu Yang , Sheng-Chen Wang , Sai-Hooi Yeong , Feng-Cheng Yang , Yen-Ming Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/11 ; H01L21/027 ; H01L21/306 ; H01L21/311 ; H01L21/8234 ; H01L29/66 ; H01L29/08 ; H01L29/165

Abstract:
A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.
Public/Granted literature
- US20180308852A1 Flexible Merge Scheme for Source/Drain Epitaxy Regions Public/Granted day:2018-10-25
Information query
IPC分类: