Invention Grant
- Patent Title: Method of manufacturing a substrate with reduced threading dislocation density
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Application No.: US15757057Application Date: 2016-09-02
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Publication No.: US10483351B2Publication Date: 2019-11-19
- Inventor: Kwang Hong Lee , Chuan Seng Tan , Eugene A. Fitzgerald , Shuyu Bao
- Applicant: Nanyang Technological University , Massachusetts Institute of Technology
- Applicant Address: SG US MA Cambridge
- Assignee: Nanyang Technological University,Massachusetts Institute of Technology
- Current Assignee: Nanyang Technological University,Massachusetts Institute of Technology
- Current Assignee Address: SG US MA Cambridge
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- International Application: PCT/SG2016/050431 WO 20160902
- International Announcement: WO2017/039547 WO 20170309
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/02 ; C30B25/10 ; C30B29/08 ; H01L21/324 ; H01L33/00

Abstract:
A method of manufacturing a substrate with reduced threading dislocation density is disclosed, which comprises: (i) at a first temperature, forming a first layer of wafer material on a semiconductor substrate, the first layer arranged to be doped with a first concentration of at least one dopant that is different to the wafer material; and (ii) at a second temperature higher than the first temperature, forming a second layer of the wafer material on the first layer to obtain the substrate, the second layer arranged to be doped with a progressively decreasing concentration of the dopant during formation, the doping configured to be decreased from the first concentration to a second concentration. The wafer material and dopant are different to silicon. A related substrate is also disclosed.
Public/Granted literature
- US20180277629A1 METHOD OF MANUFACTURING A SUBSTRATE WITH REDUCED THREADING DISLOCATION DENSITY Public/Granted day:2018-09-27
Information query
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