Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16421661Application Date: 2019-05-24
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Publication No.: US10510310B2Publication Date: 2019-12-17
- Inventor: Hajime Kimura , Atsushi Umezaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2010-201621 20100909
- Main IPC: G09G3/36
- IPC: G09G3/36 ; G09G3/20

Abstract:
A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
Public/Granted literature
- US20190279586A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-09-12
Information query
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