Invention Grant
- Patent Title: Lateral MOSFET with dielectric isolation trench
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Application No.: US15646968Application Date: 2017-07-11
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Publication No.: US10516045B2Publication Date: 2019-12-24
- Inventor: Po-Yu Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/762 ; H01L29/786 ; H01L29/66 ; H01L29/06 ; H01L21/265 ; H01L27/12 ; H01L29/08 ; H01L29/10

Abstract:
A lateral trench MOSFET comprises an insulating layer buried in a substrate, a body region in the substrate, an isolation region in the substrate, a first drain/source region over the body region, a second drain/source region in the substrate, wherein the first drain/source region and the second drain/source region are on opposing sides of the isolation region, a drift region comprising a first drift region of a first doping density formed between the second drain/source region and the insulating layer, wherein the first drift region comprises an upper portion surrounded by isolation regions and a lower portion and a second drift region of a second doping density formed between the isolation region and the insulating layer, wherein a height of the second drift region is equal to a height of the lower portion of the first drift region.
Public/Granted literature
- US20170309742A1 Lateral MOSFET with Dielectric Isolation Trench Public/Granted day:2017-10-26
Information query
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