Invention Grant
- Patent Title: Method and structure for FinFET isolation
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Application No.: US16222837Application Date: 2018-12-17
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Publication No.: US10522414B2Publication Date: 2019-12-31
- Inventor: Che-Cheng Chang , Chih-Han Lin , Jr-Jung Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/66 ; H01L27/088 ; H01L29/78

Abstract:
A method of forming a semiconductor device includes receiving a substrate having a fin extending from the substrate, first and second dummy gate stacks over the substrate and engaging the fin; removing the first and second dummy gate stacks thereby forming a first trench and a second trench, wherein the first and second trenches expose first and second portions of the fin respectively; removing the first portion of the fin; and forming a gate stack in the second trench, the gate stack engaging the second portion of the fin.
Public/Granted literature
- US20190122934A1 Method and Structure for FinFET Isolation Public/Granted day:2019-04-25
Information query
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