Invention Grant
- Patent Title: Chip package and a wafer level package
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Application No.: US15883151Application Date: 2018-01-30
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Publication No.: US10522447B2Publication Date: 2019-12-31
- Inventor: Georg Meyer-Berg
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Viering, Jentschura & Partner MBB
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/495 ; H01L21/56 ; H01L23/00 ; H01L21/48 ; H01L25/065 ; H01L23/31

Abstract:
Various embodiments provide for a chip package including a carrier; a layer over the carrier; a further carrier material over the layer, the further carrier material comprising a foil; one or more openings in the further carrier material, wherein the one or more openings expose at least one or more portions of the layer from the further carrier material; and a chip comprising one or more contact pads, wherein the chip is adhered to the carrier via the one or more exposed portions of the layer.
Public/Granted literature
- US20180158759A1 CHIP PACKAGE AND A WAFER LEVEL PACKAGE Public/Granted day:2018-06-07
Information query
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