Invention Grant
- Patent Title: Uniform gate dielectric for DRAM device
-
Application No.: US15898501Application Date: 2018-02-17
-
Publication No.: US10522549B2Publication Date: 2019-12-31
- Inventor: Baonian Guo , Qintao Zhang
- Applicant: Varian Semiconductor Equipment Associates, Inc.
- Applicant Address: US MA Gloucester
- Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
- Current Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
- Current Assignee Address: US MA Gloucester
- Main IPC: H01L21/8242
- IPC: H01L21/8242 ; H01L21/02 ; H01L27/108 ; H01L21/265 ; H01L21/28 ; H01L25/03 ; H01L21/027 ; H01L21/461

Abstract:
Provided herein are approaches for forming a gate dielectric layer for a DRAM device, the method including providing a substrate having a recess formed therein, the recess including a sidewall surface and a bottom surface. The method may further include performing an ion implant into just the bottom surface of the recess, and forming a gate dielectric layer along the bottom surface of the recess and along the sidewall surface of the recess. Once formed, a thickness of the gate dielectric layer along the sidewall surface is approximately the same as a thickness of the gate dielectric layer along the bottom surface of the recess. In some embodiments, the gate dielectric layer is thermally grown within the recess. In some embodiments, the ion implant is performed after a mask layer atop the substrate is removed.
Public/Granted literature
- US20190259764A1 UNIFORM GATE DIELECTRIC FOR DRAM DEVICE Public/Granted day:2019-08-22
Information query
IPC分类: