Invention Grant
- Patent Title: Three-dimensional transistor
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Application No.: US15707359Application Date: 2017-09-18
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Publication No.: US10522619B2Publication Date: 2019-12-31
- Inventor: Xinyuan Lin , Ying Jin
- Applicant: Semiconductor Manufacturing International (Beijing) Corporation , Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Beijing CN Shanghai
- Assignee: Semiconductor Manufacturing International (Beijing) Corporation,Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Beijing) Corporation,Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Beijing CN Shanghai
- Agency: Anova Law Group, PLLC
- Priority: CN201510526717 20150825
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L21/762 ; H01L29/66

Abstract:
The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation structures on a semiconductor substrate. The active region is formed between the two isolation structures. The method further includes forming a photoresist layer on the active region and the isolation structures, forming an opening in the photoresist layer to expose a top surface of the active region and a portion of a top surface of each isolation structure, and then forming a trench on each side of the active region by removing a portion of the corresponding isolation structure exposed in the opening through an etching process using the photoresist layer as an etch mask. After the etching process, the portion of the active region between the two trenches becomes a three-dimensional fin structure. The disclosed method simplifies fabrication process for three-dimensional transistors and reduces product cost.
Public/Granted literature
- US20180006112A1 THREE-DIMENSIONAL TRANSISOR Public/Granted day:2018-01-04
Information query
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