Invention Grant
- Patent Title: LIN-compatible fast-data bus
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Application No.: US16005031Application Date: 2018-06-11
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Publication No.: US10523461B2Publication Date: 2019-12-31
- Inventor: Marek Hustava , Tomas Suchy
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Ramey & Schwalter, LLP
- Agent Daniel J. Krueger
- Main IPC: H04L12/40
- IPC: H04L12/40 ; H04L25/03

Abstract:
Methods and transceivers are provided for enabling fast-data messages on a local interconnect network (LIN) compatible bus. One illustrative slave transceiver embodiment includes: a comparator and a digital-to-analog converter (DAC). The comparator detects amplitude modulation of a bias voltage at a first baud rate on a serial bus line to receive a first LIN frame header having a frame identifier for a fast-data frame. The DAC responsively drives a fast-data response message having an expanded payload and/or a higher baud rate on the serial bus line.
Public/Granted literature
- US20190158310A1 LIN-COMPATIBLE FAST-DATA BUS Public/Granted day:2019-05-23
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