Invention Grant
- Patent Title: Die interconnect signal management devices and methods
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Application No.: US15622775Application Date: 2017-06-14
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Publication No.: US10528103B2Publication Date: 2020-01-07
- Inventor: Chenchu Punnarao Bandi , Amit Kumar Srivastava
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/26 ; H04B3/54 ; G06F1/06
Abstract:
A microelectronic assembly may include a first microelectronic device, a second microelectronic device, a first signal link, a second signal link, and a first power connection. The first microelectronic device may include a first interface powered at a first voltage. The second microelectronic device may include a second interface powered at a second voltage. The first signal link may supply a first signal at the first voltage from the first interface to the second interface. The second signal link may supply a second signal at the second voltage from the second interface to the first interface. The first power connection may supply a first reference signal at the first voltage from the first interface to the second interface.
Public/Granted literature
- US20180364774A1 DIE INTERCONNECT SIGNAL MANAGEMENT DEVICES AND METHODS Public/Granted day:2018-12-20
Information query
