Invention Grant
- Patent Title: Blocking instruction fetching in a computer processor
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Application No.: US15064024Application Date: 2016-03-08
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Publication No.: US10528352B2Publication Date: 2020-01-07
- Inventor: Bryan G. Hickerson , Sheldon Levenstein , David S. Levitan , Albert J. Van Norstrand, Jr.
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Nathan M. Rau
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30 ; G06F12/0875

Abstract:
Blocking instruction fetching in a computer processor, includes: receiving a non-branching instruction to be executed by the computer processor; determining whether executing the non-branching instruction will cause a flush; and responsive to determining that executing the non-branching instruction will cause a flush, disabling instruction fetching for the computer processor for a time, including recoding the instruction such that the recoded instruction will be interpreted by an instruction fetch unit as an unconditional branch instruction.
Public/Granted literature
- US20170262286A1 BLOCKING INSTRUCTION FETCHING IN A COMPUTER PROCESSOR Public/Granted day:2017-09-14
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