Invention Grant
- Patent Title: Technologies for combining logical-to-physical address table updates in a single write operation
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Application No.: US15278837Application Date: 2016-09-28
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Publication No.: US10528463B2Publication Date: 2020-01-07
- Inventor: Peng Li , Anand S. Ramalingam , William K. Lui , Sanjeev N. Trika
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Barnes & Thornburg LLP
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F3/06 ; G11C14/00

Abstract:
Technologies for combining logical-to-physical address updates include a data storage device. The data storage device includes a non-volatile memory to store data and a logical to physical (L2P) table indicative of logical addresses and associated physical addresses of the data. Additionally, the data storage device includes a volatile memory to store one or more bins. Each bin is indicative of a subset of entries in the L2P table. Further, the data storage device includes a controller to allocate a bin in the volatile memory, write a plurality of updates to a subset of entries of the L2P table to the bin, and write the bin to the L2P table in a single write operation. Other embodiments are also described and claimed.
Public/Granted literature
- US20180089076A1 TECHNOLOGIES FOR COMBINING LOGICAL-TO-PHYSICAL ADDRESS UPDATES Public/Granted day:2018-03-29
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