Invention Grant
- Patent Title: Memory system and control method
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Application No.: US15802331Application Date: 2017-11-02
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Publication No.: US10528464B2Publication Date: 2020-01-07
- Inventor: Masahiro Ishiyama , Shigehiro Asano
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Kim and Stewart LLP
- Priority: JP2016-215831 20161104
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/02 ; G06F11/10 ; G06F1/3203

Abstract:
A memory system includes a nonvolatile memory having memory dies controlled in parallel and each including a plurality of physical blocks, and a controller. The controller manages a plurality of logical areas for storing data portions received from the host and parities calculated from the data portions, the logical areas including first and second logical areas for storing first and second parity groups, respectively. Each first parity group includes k data portions received from the host and m parities calculated therefrom. Each second parity group includes k′ data portions received from the host and m′ parities calculated therefrom. Also, the controller maps each logical area to storage locations in the non-volatile memory dies such that the data portions and the parities of any one parity group are each stored in a different physical block in a set of physical blocks selected from different non-volatile memory dies.
Public/Granted literature
- US20180129600A1 MEMORY SYSTEM AND CONTROL METHOD Public/Granted day:2018-05-10
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