Invention Grant
- Patent Title: Formation of pure silicon oxide interfacial layer on silicon-germanium channel field effect transistor device
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Application No.: US15950773Application Date: 2018-04-11
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Publication No.: US10529573B2Publication Date: 2020-01-07
- Inventor: Takashi Ando , Pouya Hashemi , Hemanth Jagannathan , Choonghyun Lee , Vijay Narayanan
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Vazken Alexanian
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/51 ; H01L29/161 ; H01L21/28 ; H01L21/02 ; H01L21/84 ; H01L29/49

Abstract:
Methods are provided to form pure silicon oxide layers on silicon-germanium (SiGe) layers, as well as an FET device having a pure silicon oxide interfacial layer of a metal gate structure formed on a SiGe channel layer of the FET device. For example, a method comprises growing a first silicon oxide layer on a surface of a SiGe layer using a first oxynitridation process, wherein the first silicon oxide layer comprises nitrogen. The first silicon oxide layer is removed, and a second silicon oxide layer is grown on the surface of the SiGe layer using a second oxynitridation process, which is substantially the same as the first oxynitridation process, wherein the second silicon oxide layer is substantially devoid of germanium oxide and nitrogen. For example, the first silicon oxide layer comprises a SiON layer and the second silicon oxide layer comprises a pure silicon dioxide layer.
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