Invention Grant
- Patent Title: Multi-faced molded semiconductor package and related methods
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Application No.: US15679661Application Date: 2017-08-17
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Publication No.: US10529576B2Publication Date: 2020-01-07
- Inventor: Eiji Kurose
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Adam R. Stephenson, Ltd.
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/302 ; H01L21/56 ; H01L23/31 ; H01L21/48 ; H01L23/12 ; H01L23/00

Abstract:
Implementations of a method of forming a semiconductor package may include forming electrical contacts on a first side of a wafer, applying a photoresist layer to the first side of the wafer, patterning the photoresist layer, and etching notches into the first side of the wafer using the photoresist layer. The method may include applying a first mold compound into the notches and over the first side of the wafer, grinding a second side of the wafer opposite the first side of the wafer to the notches formed in the first side of the wafer, applying one of a second mold compound and a laminate resin to a second side of the wafer, and singulating the wafer into semiconductor packages. Six sides of a die included in each semiconductor package may be covered by one of the first mold compound, the second mold compound, and the laminate resin.
Public/Granted literature
- US20190057874A1 MULTI-FACED MOLDED SEMICONDUCTOR PACKAGE AND RELATED METHODS Public/Granted day:2019-02-21
Information query
IPC分类: