Invention Grant
- Patent Title: 3D vertical FET with top and bottom gate contacts
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Application No.: US16023120Application Date: 2018-06-29
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Publication No.: US10529625B2Publication Date: 2020-01-07
- Inventor: Brent A. Anderson , Albert M. Chu
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/8234 ; H01L23/535 ; H01L29/78 ; H01L29/423 ; H01L23/00 ; H01L23/48 ; H01L27/088 ; H01L29/66 ; H01L21/768 ; H01L21/8238 ; H01L27/092
Abstract:
A method for forming a semiconductor device includes forming bottom side metallization structures having at least one connection to a bottom side of a vertical transistor disposed on a substrate, the bottom side metallization structures including a power rail and a ground rail. After forming the bottom side metallization structures, the substrate is removed and the vertical transistor is flipped. Top side metallization structures are formed. The top side metallization structures having at least one connection to the vertical transistor on a top side of the vertical transistor.
Public/Granted literature
- US20180308762A1 3D VERTICAL FET WITH TOP AND BOTTOM GATE CONTACTS Public/Granted day:2018-10-25
Information query
IPC分类:
