Invention Grant
- Patent Title: Methods of forming metal gates
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Application No.: US15966299Application Date: 2018-04-30
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Publication No.: US10529629B2Publication Date: 2020-01-07
- Inventor: Ju-Li Huang , Hsin-Che Chiang , Ju-Yuan Tzeng , Wei-Ze Xu , Yueh-Yi Chen , Shu-Hui Wang , Shih-Hsun Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L29/49 ; H01L29/51 ; H01L29/66 ; H01L21/02 ; H01L21/28 ; H01L21/311
Abstract:
A method includes removing a dummy gate structure formed over a first fin and a second fin, forming an interfacial layer in the first trench and the second trench, forming a first high-k dielectric layer over the interfacial layer in the first trench and the second trench, removing the first high-k dielectric layer in the second trench, forming a self-assembled monolayer over the first high-k dielectric layer in the first trench, forming a second high-k dielectric layer over the self-assembled monolayer in the first trench and over the interfacial layer in the second trench, forming a work function metal layer in the first and the second trenches, and forming a bulk conductive layer over the work function metal layer in the first and the second trenches. In some embodiments, the first high-k dielectric layer includes lanthanum and oxygen.
Public/Granted literature
- US20190333826A1 Methods of Forming Metal Gates Public/Granted day:2019-10-31
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