Invention Grant
- Patent Title: Integrated circuits with selectively strained device regions and methods for fabricating same
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Application No.: US15140863Application Date: 2016-04-28
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Publication No.: US10529738B2Publication Date: 2020-01-07
- Inventor: Raj Verma Purakh , Shaoqiang Zhang , Rui Tze Toh
- Applicant: Globalfoundries Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Thompson Hine LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/778 ; H01L29/10 ; H01L29/78 ; H01L27/12 ; H01L21/762 ; H01L21/02 ; H01L21/84 ; H01L21/3105 ; H01L21/32 ; H01L21/311 ; H01L21/77

Abstract:
Integrated circuits and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes providing a substrate including a semiconductor layer over an insulator layer. The method includes selectively replacing portions of the semiconductor layer with insulator material to define an isolated semiconductor layer region. Further, the method includes selectively forming a relaxed layer on the isolated semiconductor layer region. Also, the method includes selectively forming a strained layer on the relaxed layer. The method forms a device over the strained layer.
Public/Granted literature
- US20170317103A1 INTEGRATED CIRCUITS WITH SELECTIVELY STRAINED DEVICE REGIONS AND METHODS FOR FABRICATING SAME Public/Granted day:2017-11-02
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