Field effect transistor
Abstract:
A field effect transistor having a reduced sheet resistance is provided. A channel layer, a first spacer layer, a second spacer layer, a first electronic barrier layer, and a second electronic barrier layer are sequentially grown on the main surface of a substrate. A gate recess is created, and then an ion implanted section is formed. A third electronic barrier layer and a p-type layer are formed by a metalorganic chemical vapor deposition (MOCVD) method. The p-type layer except a portion at the gate recess is removed. B ions are implanted in the regrown third electronic barrier layer to reform the ion implanted section. A source electrode and a drain electrode are formed on the third electronic barrier layer. Then a gate electrode is formed on the p-type layer.
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