Invention Grant
- Patent Title: Trim setting determination for a memory device
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Application No.: US15802597Application Date: 2017-11-03
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Publication No.: US10535415B2Publication Date: 2020-01-14
- Inventor: Aswin Thiruvengadam , Daniel L. Lowrance , Peter Feeley
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/02 ; G06F12/02 ; G11C16/10 ; G11C29/44

Abstract:
Apparatuses and methods related to a memory system including a controller and an array of memory cells are provided. An apparatus can include a controller configured to receive operational characteristics of an array of memory cells based on prior operations performed by the array of memory cells, determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells, and send the set of trim settings to the array of memory cells.
Public/Granted literature
- US20190139619A1 TRIM SETTING DETERMINATION FOR A MEMORY DEVICE Public/Granted day:2019-05-09
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