Invention Grant
- Patent Title: Formation method of semiconductor device with gate spacer
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Application No.: US16157589Application Date: 2018-10-11
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Publication No.: US10535512B2Publication Date: 2020-01-14
- Inventor: Guan-Yao Tu , Yu-Yun Peng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/469
- IPC: H01L21/469 ; H01L21/02 ; H01L29/49 ; H01L29/51 ; H01L23/10 ; H01L29/08 ; H01L29/66 ; H01L29/78

Abstract:
A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate. The method also includes forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process. The atomic layer deposition process includes alternately and sequentially introducing a first silicon-containing precursor gas and a second silicon-containing precursor gas over the sidewall of the gate stack to form the sealing layer. The second silicon-containing precursor gas has a different atomic concentration of carbon than that of the first silicon-containing precursor gas. The method further includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.
Public/Granted literature
- US20190157075A1 FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH GATE SPACER Public/Granted day:2019-05-23
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