Invention Grant
- Patent Title: Vertical memory device including common source line structure
-
Application No.: US15831498Application Date: 2017-12-05
-
Publication No.: US10535599B2Publication Date: 2020-01-14
- Inventor: Kwang-Soo Kim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2016-0010725 20160128
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/528 ; H01L27/115 ; H01L27/11582 ; H01L49/02

Abstract:
An integrated circuit (IC) device includes: a channel region that extends on the substrate to penetrate a plurality of word lines; a bit line contact pad that contacts an upper surface of the channel region; a bit line that contacts the bit line contact pad and extends on the bit line contact pad in a direction parallel to the main surface of the substrate; a common source line that partially fills a word line cut region and has a height lower than that of the channel region; and a common source via contact that contacts an upper surface of the common source line in the word line cut region.
Public/Granted literature
- US20180102316A1 INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2018-04-12
Information query
IPC分类: