Invention Grant
- Patent Title: Integrated circuits and manufacturing methods thereof
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Application No.: US15094697Application Date: 2016-04-08
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Publication No.: US10535655B2Publication Date: 2020-01-14
- Inventor: Ali Keshavarzi , Ta-Pen Guo , Shu-Hui Sung , Hsiang-Jen Tseng , Shyue-Shyh Lin , Lee-Chung Lu , Chung-Cheng Wu , Li-Chun Tien , Jung-Chan Yang , Ting-Yu Chen , Min Cao , Yung-Chin Hou
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L23/485 ; H01L27/02 ; H01L29/423 ; H01L29/66 ; H01L29/78 ; H01L29/06 ; H01L29/49

Abstract:
An integrated circuit includes a first diffusion area for a first type transistor. The first type transistor includes a first drain region and a first source region. A second diffusion area for a second type transistor is separated from the first diffusion area. The second type transistor includes a second drain region and a second source region. A gate electrode continuously extends across the first diffusion area and the second diffusion area in a routing direction. A first metallic structure is electrically coupled with the first source region. A second metallic structure is electrically coupled with the second drain region. A third metallic structure is disposed over and electrically coupled with the first and second metallic structures. A width of the first metallic structure is substantially equal to or larger than a width of the third metallic structure.
Public/Granted literature
- US20160372469A1 INTEGRATED CIRCUITS AND MANUFACTURING METHODS THEREOF Public/Granted day:2016-12-22
Information query
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