Invention Grant
- Patent Title: Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices
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Application No.: US15992817Application Date: 2018-05-30
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Publication No.: US10535752B2Publication Date: 2020-01-14
- Inventor: Kong-Beng Thei , Chien-Chih Chou , Hsiao-Chin Tuan , Yi-Huan Chen , Alexander Kalnitsky
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik LLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/768 ; H01L29/78

Abstract:
In some embodiments, a semiconductor device is provided. The semiconductor device includes a pair of source/drain regions disposed in a semiconductor substrate, where the source/drain regions are laterally spaced. A gate electrode is disposed over the semiconductor substrate between the source/drain regions. Sidewall spacers are disposed over the semiconductor substrate on opposite sides of the gate electrode. A silicide blocking structure is disposed over the sidewalls spacers, where respective sides of the source/drain regions facing the gate electrode are spaced apart from outer sides of the sidewall spacers and are substantially aligned with outer sidewalls of the silicide blocking structure.
Public/Granted literature
- US20190371906A1 METHOD AND RELATED APPARATUS FOR REDUCING GATE-INDUCED DRAIN LEAKAGE IN SEMICONDUCTOR DEVICES Public/Granted day:2019-12-05
Information query
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