Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Invention Grant

US10535769B2 Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions 有权

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Patent Title: Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
Application No.: US16296448

Application Date: 2019-03-08
Publication No.: US10535769B2

Publication Date: 2020-01-14
Inventor: Satoru Mayuzumi , Hitoshi Wakabayashi
Applicant: Sony Corporation
Applicant Address: JP Tokyo
Assignee: SONY CORPORATION
Current Assignee: SONY CORPORATION
Current Assignee Address: JP Tokyo
Agency: Dentons US LLP
Priority: JP2009-140930 20090612
Main IPC: H01L29/78
IPC: H01L29/78 ; H01L29/423 ; H01L29/51 ; H01L29/49 ; H01L21/265 ; H01L29/66 ; H01L29/08 ; H01L29/16 ; H01L29/161 ; H01L29/165

Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions

Abstract:

A semiconductor device including a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel region; a gate electrode formed on the channel region with a gate insulating film therebetween; and a stress-introducing layer that applies stress to the channel region, the semiconductor device having a stress distribution in which source region-side and drain region-side peaks are positioned between a pn junction boundary of the channel region and the source region and a pn junction boundary of the channel region and the drain region.

Public/Granted literature

US20190207029A1 SEMICONDUCTOR DEVICE HAVING CURVED GATE ELECTRODE ALIGNED WITH CURVED SIDE-WALL INSULATING FILM AND STRESS-INTRODUCING LAYER BETWEEN CHANNEL REGION AND SOURCE AND DRAIN REGIONS Public/Granted day:2019-07-04

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L29/00	专门适用于整流、放大、振荡或切换，并具有至少一个电位跃变势垒或表面势垒的半导体器件；具有至少一个电位跃变势垒或表面势垒，例如PN结耗尽层或载流子集结层的电容器或电阻器；半导体本体或其电极的零部件（H01L31/00至H01L47/00，H01L51/05优先；除半导体或其电极之外的零部件入H01L23/00；由在一个共用衬底内或其上形成的多个固态组件组成的器件入H01L27/00）
H01L29/66	.按半导体器件的类型区分的
H01L29/68	..只能通过对一个不通有待整流、放大或切换的电流的电极供给电流或施加电位方可进行控制的（H01L29/96优先）
H01L29/76	...单极器件
H01L29/772	....场效应晶体管
H01L29/78	.....由绝缘栅产生场效应的