Invention Grant
- Patent Title: Via structure, MRAM device using the via structure and method for fabricating the MRAM device
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Application No.: US16059777Application Date: 2018-08-09
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Publication No.: US10535816B2Publication Date: 2020-01-14
- Inventor: Jung-Tang Wu , Szu-Ping Tung , Szu-Hua Wu , Shing-Chyang Pan , Meng-Yu Wu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L43/12
- IPC: H01L43/12 ; H01L27/22 ; H01L43/02

Abstract:
A via structure, a MRAM device using the via structure and a method for fabricating the MRAM device are provided. In the method for fabricating the MRAM device, at first, a first dielectric layer is deposited over a transistor. Then, a contact is formed in the first dielectric layer and electrically connected to the transistor. Thereafter, a metal nitride layer is deposited over the first dielectric layer and the contact. Then, an etch stop layer is deposited over the metal nitride layer. Thereafter, a second dielectric layer is deposited over the etch stop layer. Then, a via structure is formed in the second dielectric layer, the etch stop layer, and the metal nitride layer and landing on the contact. Thereafter, a memory stack is formed over the via structure.
Public/Granted literature
- US20190157548A1 VIA STRUCTURE, MRAM DEVICE USING THE VIA STRUCTURE AND METHOD FOR FABRICATING THE MRAM DEVICE Public/Granted day:2019-05-23
Information query
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