Invention Grant
- Patent Title: Chip package test system
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Application No.: US15802253Application Date: 2017-11-02
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Publication No.: US10539610B2Publication Date: 2020-01-21
- Inventor: Mohsen H. Mardi , David M. Mahoney
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Keith Taboada
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R31/28 ; G01R31/04

Abstract:
An integrated chip package assembly test system and method for testing a chip package assembly are described herein. In one example, an integrated circuit chip package test system includes a socket and a workpress. The socket is configured to receive a chip package assembly for testing in the test system. The workpress is positioned over the socket and has a bottom surface that is dynamically conformable to a multi-planar top surface topography of the chip package assembly.
Public/Granted literature
- US20190128956A1 UNIVERSAL CONFORMING WORKPRESS MECHANISM FOR SEMICONDUCTOR AND OTHER APPLICATION TESTING Public/Granted day:2019-05-02
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