Invention Grant
- Patent Title: Method and apparatus for supporting the use of interleaved memory regions
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Application No.: US15026586Application Date: 2014-10-15
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Publication No.: US10540277B2Publication Date: 2020-01-21
- Inventor: Michael Soulie , Riccardo Locatelli , Valerio Catalano , Giuseppe Maruccia , Giuseppe Guarnaccia , Raffaele Guarrasi
- Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS , STMICROELECTRONICS S.R.L.
- Applicant Address: FR Grenoble IT Agrate Brianza
- Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS,STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS,STMICROELECTRONICS S.R.L.
- Current Assignee Address: FR Grenoble IT Agrate Brianza
- Agency: Seed IP Law Group LLP
- Priority: GB1318476.7 20131018
- International Application: PCT/EP2014/072139 WO 20141015
- International Announcement: WO2015/055728 WO 20150423
- Main IPC: G06F12/06
- IPC: G06F12/06 ; G06F15/78 ; G06F17/50
Abstract:
A method comprising: receiving a transaction associated with an address and having a transaction destination, said address being in an interleaved region of a memory; determining one of a plurality of destinations for said transaction, different parts of said interleaved memory region being respectively accessible by said plurality of destinations; and associating routing information to said transaction, said routing information associated with the determined destination.
Public/Granted literature
- US20160246714A1 METHOD AND APPARATUS FOR SUPPORTING THE USE OF INTERLEAVED MEMORY REGIONS Public/Granted day:2016-08-25
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