Invention Grant
- Patent Title: Layout design system and semiconductor device fabricated using the same
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Application No.: US15590294Application Date: 2017-05-09
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Publication No.: US10540471B2Publication Date: 2020-01-21
- Inventor: Kyoung Kuk Chae , Hoi Jin Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierec, P.L.C.
- Priority: KR10-2016-0057347 20160511; KR10-2016-0113330 20160902
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L27/02 ; H01L27/088 ; H01L29/78 ; H01L27/11575

Abstract:
A semiconductor device is provided. A semiconductor device includes a filler cell including first and second insulating structures, the first and second insulating structures extending in a first direction, the filler cell being defined by first cell boundaries; and a neighboring cell including a third insulating structure, the third insulating structure extending in the first direction, the neighboring cell being adjacent to the filler cell in the first direction and defined by second cell boundaries, wherein the first and second insulating structures are spaced apart from one another in a second direction, is the second direction being perpendicular to the first direction.
Public/Granted literature
- US20170329885A1 LAYOUT DESIGN SYSTEM AND SEMICONDUCTOR DEVICE FABRICATED USING THE SAME Public/Granted day:2017-11-16
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