Invention Grant
- Patent Title: Memory system with signals on read lines not phase-aligned with Josephson transmission line (JTL) elements included in the write lines
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Application No.: US15990099Application Date: 2018-05-25
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Publication No.: US10541024B2Publication Date: 2020-01-21
- Inventor: Randall M. Burnett , Randal L. Posey , Haitao O. Dai , Quentin P. Herr
- Applicant: Microsoft Technology Licensing, LLC
- Applicant Address: US WA Redmond
- Assignee: Microsoft Technology Licensing, LLC
- Current Assignee: Microsoft Technology Licensing, LLC
- Current Assignee Address: US WA Redmond
- Agency: Singh Law, PLLC
- Agent Ranjeev Singh
- Main IPC: G11C11/44
- IPC: G11C11/44 ; H01L39/22 ; H01L39/02 ; H01L39/12
Abstract:
Current-based superconductor memory cell and related systems and methods are provided. A method in a memory system, having at least one storage circuit and at least one read SQUID, includes applying bit-line current, via a read bit-line not including any Josephson transmission line (JTL) elements, to the at least one read SQUID. The method further includes applying word-line current, via a read word-line not including any JTL elements, to the at least one read SQUID. The method further includes using the at least one read SQUID reading a logic state of the memory cell based on data maintained in the storage circuit.
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