Invention Grant
- Patent Title: Systems and methods for wafer pod calibration
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Application No.: US15882272Application Date: 2018-01-29
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Publication No.: US10541162B2Publication Date: 2020-01-21
- Inventor: Chao-Hsiang Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manfacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manfacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G06F7/00
- IPC: G06F7/00 ; H01L21/67 ; G01B11/00 ; B25J9/16 ; B25J11/00 ; H01L21/687 ; H01L21/68 ; H01L21/673 ; H01L21/677

Abstract:
In an embodiment, a system includes: a wafer pod defining a cavity configured to store a wafer at a wafer position; calibration sensors within the cavity, each calibration sensor configured to produce calibration data indicating that the wafer is at a respective part of the cavity; and a processor configured to determine whether the wafer is positioned at the wafer position within the cavity based on the calibration data.
Public/Granted literature
- US20190164790A1 SYSTEMS AND METHODS FOR WAFER POD CALIBRATION Public/Granted day:2019-05-30
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