Invention Grant
- Patent Title: Etching process control in forming MIM capacitor
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Application No.: US16016908Application Date: 2018-06-25
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Publication No.: US10541298B2Publication Date: 2020-01-21
- Inventor: Hung-Hao Chen , Che-Cheng Chang , Wen-Tung Chen , Yu-Cheng Liu , Horng-Huei Tseng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L49/02
- IPC: H01L49/02

Abstract:
A method includes forming a capacitor, which includes depositing a bottom electrode layer, depositing a capacitor insulator layer over the bottom electrode layer, depositing a top electrode layer over the capacitor insulator layer, and depositing a dielectric layer over the top electrode layer. The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate, and a ratio of the first etching rate to the second etching rate is higher than about 5.0.
Public/Granted literature
- US20180301526A1 Etching Process Control in Forming MIM Capacitor Public/Granted day:2018-10-18
Information query
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